Type Alias Lpi2c3

pub type Lpi2c3 = Lpi2c<Pins<P16, P17>, 3>;

LPI2C3 peripheral.

• Pin 16 is the clock line.
• Pin 17 is the data line.

Use lpi2c to create this driver.

Aliased Type

struct Lpi2c3 { /* private fields */ }

Implementations

impl<P, const N: u8> Lpi2c<P, N>

pub const N: u8 = N

The peripheral instance.

pub fn is_controller_enabled(&self) -> bool

Indicates if the controller is (true) or is not (false) enabled.

pub fn set_controller_enable(&mut self, enable: bool)

Enable (true) or disable (false) the controller.

pub fn reset_controller(&mut self)

Reset the controller.

Note that this may not not reset all peripheral state, like the controller enabled state.

pub fn release(self) -> (Instance<RegisterBlock, N>, P)

Release the LPI2C components.

This does not change any component state; it releases the components as-is. If you need to obtain the registers in a known, good state, consider calling methods like reset_controller() before releasing the registers.

pub fn controller_status(&self) -> ControllerStatus

Read the controller status bits.

pub fn clear_controller_status(&self, status: ControllerStatus)

Clear the controller status bits that are set high.

The implementation will clear any read-only bits, so it’s OK to pass in ControllerStatus::all().

pub fn clear_fifo(&mut self)

Resets the transmit and receive FIFOs.

pub fn enqueue_controller_command(&self, command: ControllerCommand)

Enqueue a command into the controller transmit data register.

enqueue_controller_command does not check that the FIFO can hold the command. Check for the transmit data flag in the status response to understand the FIFO’s state.

pub fn read_data_register(&self) -> Option<u8>

Read the controller receive data register.

Returns None if there is no data in the receive FIFO.

pub fn disabled<R>(&mut self, func: impl FnOnce(&mut Disabled<'_, N>) -> R) -> R

Temporarily disable the LPI2C peripheral.

The handle to a Disabled driver lets you modify LPI2C settings that require a fully disabled peripheral.

pub fn pins(&self) -> &P

Borrow the pins.

pub fn pins_mut(&mut self) -> &mut P

Exclusively borrow the pins.

pub fn interrupts(&self) -> Interrupts

Returns the bitflags that indicate enabled or disabled LPI2C interrupts.

pub fn set_interrupts(&self, interrupts: Interrupts)

Enable or disable LPI2C interrupts.

pub fn watermark(&self, direction: Direction) -> u8

Returns the watermark level for the given direction.

pub fn controller_fifo_status(&self) -> ControllerFifoStatus

Returns the FIFO status.

impl<SCL, SDA, const N: u8> Lpi2c<Pins<SCL, SDA>, N>

where SDA: Pin<Signal = Sda, Module = Const<N>>, SCL: Pin<Signal = Scl, Module = Const<N>>,

pub fn new( lpi2c: Instance<RegisterBlock, N>, pins: Pins<SCL, SDA>, timings: &Timing, ) -> Lpi2c<Pins<SCL, SDA>, N>

Create an LPI2C driver from an LPI2C instance and a pair of pins.

When this call returns, the LPI2C pins are configured for their LPI2C functions, the controller is enabled after reset, and the driver is using the provided timing configuration for the clock.

Trait Implementations

impl<P, const N: u8> ErrorType for Lpi2c<P, N>

type Error = ControllerStatus

Error type

impl<P, const N: u8> I2c for Lpi2c<P, N>

fn transaction( &mut self, address: u8, operations: &mut [Operation<'_>], ) -> Result<(), <Lpi2c<P, N> as ErrorType>::Error>

Execute the provided operations on the I2C bus.

fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error>

Reads enough bytes from slave with address to fill read.

fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error>

Writes bytes to slave with address address.

fn write_read( &mut self, address: A, write: &[u8], read: &mut [u8], ) -> Result<(), Self::Error>

Writes bytes to slave with address address and then reads enough bytes to fill read in a single transaction.

impl<P, const N: u8> Read for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn read( &mut self, address: u8, buffer: &mut [u8], ) -> Result<(), <Lpi2c<P, N> as Read>::Error>

Reads enough bytes from slave with address to fill buffer

impl<P, const N: u8> Transactional for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn exec( &mut self, address: u8, operations: &mut [Operation<'_>], ) -> Result<(), <Lpi2c<P, N> as Transactional>::Error>

Execute the provided operations on the I2C bus.

impl<P, const N: u8> TransactionalIter for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn exec_iter<'a, O>( &mut self, address: u8, operations: O, ) -> Result<(), <Lpi2c<P, N> as TransactionalIter>::Error>

where O: IntoIterator<Item = Operation<'a>>,

Execute the provided operations on the I2C bus (iterator version).

impl<P, const N: u8> Write for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn write( &mut self, address: u8, bytes: &[u8], ) -> Result<(), <Lpi2c<P, N> as Write>::Error>

Writes bytes to slave with address address

impl<P, const N: u8> WriteIter for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn write<B>( &mut self, address: u8, bytes: B, ) -> Result<(), <Lpi2c<P, N> as WriteIter>::Error>

where B: IntoIterator<Item = u8>,

Writes bytes to slave with address address

impl<P, const N: u8> WriteIterRead for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn write_iter_read<B>( &mut self, address: u8, bytes: B, buffer: &mut [u8], ) -> Result<(), <Lpi2c<P, N> as WriteIterRead>::Error>

where B: IntoIterator<Item = u8>,

Writes bytes to slave with address address and then reads enough bytes to fill buffer in a single transaction

impl<P, const N: u8> WriteRead for Lpi2c<P, N>

type Error = ControllerStatus

Error type

fn write_read( &mut self, address: u8, bytes: &[u8], buffer: &mut [u8], ) -> Result<(), <Lpi2c<P, N> as WriteRead>::Error>

Writes bytes to slave with address address and then reads enough bytes to fill buffer in a single transaction