Struct Lpi2c 

pub struct Lpi2c { /* private fields */ }

An LPI2C driver.

Use this driver to communicate with I2C devices. This driver implements various embedded-hal I2C traits, and you should prefer these implementations for their ease of use.

See the module-level documentation for an example of how to construct this driver.

Implementations

impl Lpi2c

pub fn with_pins<SCL, SDA, const N: u8>( lpi2c: Instance<RegisterBlock, N>, pins: Pins<SCL, SDA>, timings: &Timing, ) -> Lpi2c

where SCL: Pin<Signal = Scl, Module = Const<N>>, SDA: Pin<Signal = Sda, Module = Const<N>>,

Create an LPI2C driver from an LPI2C instance and a pair of pins.

When this call returns, the LPI2C pins are configured for their LPI2C functions, the controller is enabled after reset, and the driver is using the provided timing configuration for the clock.

The pins are consumed to ensure they’re properly configured, but they are not stored in the driver.

pub fn without_pins<const N: u8>( lpi2c: Instance<RegisterBlock, N>, timings: &Timing, ) -> Lpi2c

Create an I2C driver from an LPI2C instance.

This is similar to with_pins(), but it does not configure pins. You’re responsible for configuring pins, and for making sure the pin configuration doesn’t change while this driver is in use.

pub fn is_controller_enabled(&self) -> bool

Indicates if the controller is (true) or is not (false) enabled.

pub fn set_controller_enable(&mut self, enable: bool)

Enable (true) or disable (false) the controller.

pub fn reset_controller(&mut self)

Reset the controller.

Note that this may not not reset all peripheral state, like the controller enabled state.

pub fn controller_status(&self) -> ControllerStatus

Read the controller status bits.

pub fn clear_controller_status(&self, status: ControllerStatus)

Clear the controller status bits that are set high.

The implementation will clear any read-only bits, so it’s OK to pass in ControllerStatus::all().

pub fn clear_fifo(&mut self)

Resets the transmit and receive FIFOs.

pub fn enqueue_controller_command(&self, command: ControllerCommand)

Enqueue a command into the controller transmit data register.

enqueue_controller_command does not check that the FIFO can hold the command. Check for the transmit data flag in the status response to understand the FIFO’s state.

pub fn read_data_register(&self) -> Option<u8>

Read the controller receive data register.

Returns None if there is no data in the receive FIFO.

pub fn disabled<R>(&mut self, func: impl FnOnce(&mut Disabled<'_>) -> R) -> R

Temporarily disable the LPI2C peripheral.

The handle to a Disabled driver lets you modify LPI2C settings that require a fully disabled peripheral.

pub fn interrupts(&self) -> Interrupts

Returns the bitflags that indicate enabled or disabled LPI2C interrupts.

pub fn set_interrupts(&self, interrupts: Interrupts)

Enable or disable LPI2C interrupts.

pub fn watermark(&self, direction: Direction) -> u8

Returns the watermark level for the given direction.

pub fn controller_fifo_status(&self) -> ControllerFifoStatus

Returns the FIFO status.

Trait Implementations

impl ErrorType for Lpi2c

type Error = ControllerStatus

Error type

impl I2c for Lpi2c

fn transaction( &mut self, address: u8, operations: &mut [Operation<'_>], ) -> Result<(), <Lpi2c as ErrorType>::Error>

Execute the provided operations on the I2C bus.

fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error>

Reads enough bytes from slave with address to fill read.

fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error>

Writes bytes to slave with address address.

fn write_read( &mut self, address: A, write: &[u8], read: &mut [u8], ) -> Result<(), Self::Error>

Writes bytes to slave with address address and then reads enough bytes to fill read in a single transaction.

impl Read for Lpi2c

type Error = ControllerStatus

Error type

fn read( &mut self, address: u8, buffer: &mut [u8], ) -> Result<(), <Lpi2c as Read>::Error>

Reads enough bytes from slave with address to fill buffer

impl Transactional for Lpi2c

type Error = ControllerStatus

Error type

fn exec( &mut self, address: u8, operations: &mut [Operation<'_>], ) -> Result<(), <Lpi2c as Transactional>::Error>

Execute the provided operations on the I2C bus.

impl TransactionalIter for Lpi2c

type Error = ControllerStatus

Error type

fn exec_iter<'a, O>( &mut self, address: u8, operations: O, ) -> Result<(), <Lpi2c as TransactionalIter>::Error>

where O: IntoIterator<Item = Operation<'a>>,

Execute the provided operations on the I2C bus (iterator version).

impl Write for Lpi2c

type Error = ControllerStatus

Error type

fn write( &mut self, address: u8, bytes: &[u8], ) -> Result<(), <Lpi2c as Write>::Error>

Writes bytes to slave with address address

impl WriteIter for Lpi2c

type Error = ControllerStatus

Error type

fn write<B>( &mut self, address: u8, bytes: B, ) -> Result<(), <Lpi2c as WriteIter>::Error>

where B: IntoIterator<Item = u8>,

Writes bytes to slave with address address

impl WriteIterRead for Lpi2c

type Error = ControllerStatus

Error type

fn write_iter_read<B>( &mut self, address: u8, bytes: B, buffer: &mut [u8], ) -> Result<(), <Lpi2c as WriteIterRead>::Error>

where B: IntoIterator<Item = u8>,

Writes bytes to slave with address address and then reads enough bytes to fill buffer in a single transaction

impl WriteRead for Lpi2c

type Error = ControllerStatus

Error type

fn write_read( &mut self, address: u8, bytes: &[u8], buffer: &mut [u8], ) -> Result<(), <Lpi2c as WriteRead>::Error>

Writes bytes to slave with address address and then reads enough bytes to fill buffer in a single transaction